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| IC-LF1401 128x1 LINEAR IMAGE SENSOR Rev B1, Page 1/10 FEATURES o o o o o o o o o o o 128 active photo pixels of 56 m at a 63.5 m pitch (400 DPI) Integrating L-V conversion followed by a sample & hold circuit High sensitivity and uniformity over wavelength High clockrates of up to 5 MHz Only 128 clocks required for readout Shutter function enables flexible integration times Glitch-free analogue output Push-pull output amplifier 5 V single supply operation Can run off external bias to reduce power consumption Pin-to-pin compatible with TSL1401 APPLICATIONS o Optical line image sensors o CCD substitute PACKAGES OLGA LF2C OBGATM LF3C Die size (8.5 mm x 1.6 mm) BLOCK DIAGRAM VCC VDD CONTROL AND SHIFT REGISTER TP Sample and Hold CLK SI Control NS C D Q NQ NS C D Q NQ C D Q C Q C D Q NQ NR D NQ NR NQ NR Bit 1 Bit 2 Bit 3 Bit 127 Bit 128 NRCI SNH RPIX(1:128) SNH128 DIS ACTIVE PIXELS Pixel 1 Pixel 2 Pixel 128 PIXEI PIXOI RSET REF ONE iC-LF AGND GND VHE VHO AO OUTPUT AMPLIFIER BIAS PIXEL MULTIPLEXER Copyright (c) 2008 iC-Haus http://www.ichaus.com IC-LF1401 128x1 LINEAR IMAGE SENSOR Rev B1, Page 2/10 DESCRIPTION IC-LF1401 is an integrating light-to-voltage converter with a line of 128 pixels pitched at 63.5 m (center-tocenter distance). Each pixel consists of a 56.4 m x 200 m photodiode and an integration capacitor with a sample-and-hold circuit. The integrated control logic makes operation very simple, with only a start and clock signal necessary. A third control input (DIS) enables the integration to be suspended at any time (electronic shutter). When the start signal is given hold mode is activated for all pixels simultaneously with the next leading clock edge; starting with pixel 1 the hold voltages are switched in sequence to the push-pull output amplifier. The second clock pulse resets all integration capacitors and the integration period starts again in the background during the output phase. A run is complete after 128 clock pulses. IC-LF1401 is suitable for high clock rates of up to 5 MHz. If this is not required the supply current can be reduced via the external bias setting (current into pin RSET). IC-LF1401 128x1 LINEAR IMAGE SENSOR Rev B1, Page 3/10 PACKAGES OLGA LF2C, OBGA LF3C TM PIN CONFIGURATION OLGA LF2C PIN FUNCTIONS No. Name Function Start Integration Input Clock Input Analogue Output +5 V Supply Voltage Bias Current (connected to GND for internal bias = default; resistor from VCC to RSET for reduced current consumption) 6 AGND Analogue Ground 7 GND Digital Ground 8 DIS Hold Integration Input 1 2 3 4 5 SI CLK AO VCC RSET PIN CONFIGURATION OBGA LF3C TM CHIP LAYOUT Die size: 8.5 mm x 1.6 mm GND AGND TP RSET DIS pixel 1 ... SI pitch 63.5 um CLK active area 56.4 um x 200 um AO VDD ... pixel 128 VCC IC-LF1401 128x1 LINEAR IMAGE SENSOR Rev B1, Page 4/10 ABSOLUTE MAXIMUM RATINGS Beyond these values damage may occur; device operation is not guaranteed. Item No. Symbol Parameter Digital Supply Voltage Analog Supply Voltage Voltage at SI, CLK, DIS, RSET, TP, AO Current in RSET, TP, AO ESD Susceptibility at all pins Operating Junction Temperature Storage Temperature Range see package specification MIL-STD-883, Method 3015, HBM 100 pF discharged through 1.5 k -40 Conditions Min. -0.3 -0.3 -0.3 -10 Max. 6 6 VCC + 0.3 10 2 125 V V V mA kV C Unit G001 VDD G002 VCC G003 V() G004 I() G005 Vd() G006 Tj G007 Ts THERMAL DATA Operating Conditions: VCC = VDD = 5 V 10 % Item No. T01 Symbol Ta Parameter Conditions Min. Operating Ambient Temperature Range see package specification (extended range on request) Typ. Max. Unit All voltages are referenced to ground unless otherwise stated. All currents into the device pins are positive; all currents out of the device pins are negative. IC-LF1401 128x1 LINEAR IMAGE SENSOR Rev B1, Page 5/10 ELECTRICAL CHARACTERISTICS Operating Conditions: VCC = VDD = 5 V 10 %, RSET = GND, Tj = -25...85 C unless otherwise noted Item No. 001 002 003 004 005 006 007 008 Symbol Parameter Conditions Min. VDD VCC I(VDD) I(VCC) Vc()hi Vc()lo Vc()hi Vc()lo Digital Supply Voltage Range Analog Supply Voltage Range Supply Current in VDD Supply Current in VCC Clamp Voltage hi at SI, CLK,DIS, Vc()hi = V() - V(VCC); I() = 1 mA TP, RSET Clamp Voltage lo at SI, CLK,DIS, Vc()hi = V() - V(AGND); I() = -1 mA TP, RSET Clamp Voltage hi at AO Clamp Voltage lo at AO, VCC, VDD, GND Radiant Sensitive Area Spectral Sensitivity Spectral Application Range Saturation Voltage lo Saturation Voltage hi Sensitivity Offset Voltage Offset Voltage Deviation during integration mode Signal Deviation during hold mode Settling Time Pixel Response Nonuniformity Integral Nonlinearity Dynamic Range Power-On Release by VCC Power-Down Reset by VCC Hysteresis Permissible External Bias Current Reference Voltage Threshold Voltage hi Threshold Voltage lo Hysteresis Pull-Down Current Permissible Clock Frequency I(RSET) = Ibias see Fig. 2 see Fig. 2 Vt()hys = Vt()hi - Vt()lo, see Fig. 2 VCChys = VCCon - VCCoff 1 0.4 20 2.5 1.4 0.9 300 10 30 3 1 2 100 3.5 1.8 1.2 800 50 5 Vc()hi = V(AO) - V(VCC); I(AO) = 1 mA Vc()lo = V() - V(AGND); I() = -1 mA 0.3 -1.5 0.3 -1.5 f(CLK) = 1 MHz 4.5 4.5 200 8 Typ. Max. 5.5 5.5 300 13 1.8 -0.3 1.5 -0.3 V V A mA V V V V Unit Total Device Photodiode Array 201 202 203 301 302 303 304 305 306 307 308 309 310 311 801 802 803 901 902 B01 B02 B03 B04 B05 A() S( )max ar Vs()lo Vs()hi K V0() V0() V() tp(CLKAO) PRNU INL DR VCCon VCCoff VCChys Ibias() Vref Vt()hi Vt()lo Vt()hys I() fclk 200 m x 56.40 m per Pixel = 680 nm S( ar) = 0.25 x S( )max I() = 1 mA Vs()hi = VCC - V(), I() = -1 mA = 680 nm, package OLGA LF2C integration time 1 ms, no illumination V0() = V(AO)t1 - V(AO)t2, t = t2 - t1 = 1 ms V() = V(AO)t1 - V(AO)t2, t = t2 - t1 = 1 ms Cl(AO) = 10 pF, CLK lo hi until V(AO) = 0.98 x V(VCC) V(AO) = 2 V V(AO) = 1...3.5 V V(AO) = 2 V V(AO)max = 3.5 V 1 2 62 4.4 -250 -150 2.88 400 800 50 150 200 5 400 0.01128 0.5 980 0.5 1 mm A/W nm V V V/pWs mV mV mV ns % % mVRMS dB V V V A V V V mV A MHz Analogue Output AO Vnoise (AO) Output Noise Voltage Power-On Reset Bias Current Adjust RSET Input Interface SI, CLK, DIS Projected values by sample characterization max DR = 20 x log V (AO)V -V 0(AO)max (AO) noise IC-LF1401 128x1 LINEAR IMAGE SENSOR Rev B1, Page 6/10 OPTICAL CHARACTERISTICS: Diagrams 100 % 90 80 70 60 50 40 30 20 10 400 600 800 1000 nm Figure 1: Relative spectral sensitivity OPERATING REQUIREMENTS: Logic Operating Conditions: VCC = VDD = 5 V 10 %, Tj = -25...85 C input levels lo = 0...0.45 V, hi = 2.4 V...VCC, see Fig. 2 for reference levels Item No. Symbol Parameter Setup Time: SI stable before CLK lo hi Hold Time:SI stable after CLK lo hi Conditions Fig. Min. 3 3 50 50 Max. ns ns Unit I001 tset I002 thold thold V CLK 2.4V 2.0V Input/Output SI 0.8V 0.45V t 1 0 tset Figure 2: Reference levels Figure 3: Timing diagram IC-LF1401 128x1 LINEAR IMAGE SENSOR Rev B1, Page 7/10 DESCRIPTION OF FUNCTIONS Normal operation Following an internal power-on reset the integration and hold capacitors are discharged and the sample and hold circuit is set to sample mode. A high signal at SI and a rising edge at CLK triggers a readout cycle and with it a new integration cycle. In this process the hold capacitors of pixels 1 to 127 are switched to hold mode immediately (SNH = 1), 126 CLK 127 128 1 2 3 with pixel 128 (SNH128 = 1) following suit one clock pulse later. This special procedure allows all pixels to be read out with just 128 clock pulses. The integration capacitors are discharged by a one clock long reset signal (NRCI = 0) which occurs between the 2nd and 3rd falling edge of the readout clock pulse (cf. Figure 4). After the 127 pixels have been read out these are again set to sample mode (SNH = 0), likewise for pixel 128 one clock pulse later (SNH128 = 0). 4 ... 127 128 1 2 SI V(AO) Pix126 Pix127 Pix128 Pix1 Pix2 Pix3 ... Pix127 Pix128 Pix1 SNH SNH128 NRCI integration time pixel 1-127 integration time pixel 128 Figure 4: Readout cycle and integration sequence If prior to the 128th clock pulse a high signal occurs at SI the present readout is halted and immediately reinitiated with pixel 1. In this instance the hold ca126 CLK 127 128 1 2 3 4 pacitors retain their old value i.e. hold mode prevails (SNH/SNH128 = 0). 5 1 2 3 4 ... 128 1 2 SI V(AO) Pix126 Pix127 Pix128 Pix1 Pix2 Pix3 Pix4 Pix5 Pix1 Pix2 Pix3 Pix4 ... Pix128 Pix1 SNH SNH128 NRCI Figure 5: Restarting a readout cycle IC-LF1401 128x1 LINEAR IMAGE SENSOR Rev B1, Page 8/10 With more than 128 clock pulses until the next SI signal, pixel 1 is output without entering hold mode; the 126 CLK 127 128 1 2 3 output voltage tracks the voltage of the pixel 1 integration capacitor. 4 ... 127 128 129 130 131 SI V(AO) Pix126 Pix127 Pix128 Pix1 Pix2 Pix3 ... Pix127 Pix128 Pix1 SNH SNH128 NRCI integration time Figure 6: Clock pulse continued without giving a new integration start signal Operation with the shutter function Integration can be suspended at any time via pin DIS, i.e. the photodiodes are disconnected from their corresponding integration capacitor when DIS is high and 1 CLK 2 3 4 5 the current integration capacitor voltages are maintained. If this pin is open or switched to GND the pixel photocurrents are summed up by the integration capacitors until the next successive SI signal follows. 6 ... 127 128 1 SI SNH NRCI DIS PIX SAMPLE-C integration disabled integration enabled integration disabled Figure 7: Defining the integration time via shutter input DIS IC-LF1401 128x1 LINEAR IMAGE SENSOR Rev B1, Page 9/10 External bias current setting In order to reduce the power consumption of the device an external reference current can be supplied to pin RSET which reduces the maximum readout frequency, however. To this end a resistor must be connected from VCC to RSET. If this pin is not used, it should be connected to GND. This specification is for a newly developed product. iC-Haus therefore reserves the right to change or update, without notice, any information contained herein, design and specification; and to discontinue or limit production or distribution of any product versions. Please contact iC-Haus to ascertain the current data. Copying - even as an excerpt - is only permitted with iC-Haus approval in writing and precise reference to source. iC-Haus does not warrant the accuracy, completeness or timeliness of the specification on this site and does not assume liability for any errors or omissions in the materials. The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of the product. iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. As a general rule our developments, IPs, principle circuitry and range of Integrated Circuits are suitable and specifically designed for appropriate use in technical applications, such as in devices, systems and any kind of technical equipment, in so far as they do not infringe existing patent rights. In principle the range of use is limitless in a technical sense and refers to the products listed in the inventory of goods compiled for the 2008 and following export trade statistics issued annually by the Bureau of Statistics in Wiesbaden, for example, or to any product in the product catalogue published for the 2007 and following exhibitions in Hanover (Hannover-Messe). We understand suitable application of our published designs to be state-of-the-art technology which can no longer be classed as inventive under the stipulations of patent law. Our explicit application notes are to be treated only as mere examples of the many possible and extremely advantageous uses our products can be put to. IC-LF1401 128x1 LINEAR IMAGE SENSOR Rev B1, Page 10/10 ORDERING INFORMATION Type iC-LF Package OLGA LF2C OBGA LF3C TM - Order Designation iC-LF OLGA LF2C iC-LF OBGA LF3C iC-LF chip For technical support, information about prices and terms of delivery please contact: iC-Haus GmbH Am Kuemmerling 18 D-55294 Bodenheim GERMANY Tel.: +49 (61 35) 92 92-0 Fax: +49 (61 35) 92 92-192 Web: http://www.ichaus.com E-Mail: sales@ichaus.com Appointed local distributors: http://www.ichaus.de/support_distributors.php |
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